# File: mkstr+19_v01.src
#
program "%Z% MODULE: %M% RELEASE: %R%.%L% CREATED: %G% %U%"
source "/mdisw/cfl/flight/src/mkstr+19_v01.src"
descr "Loads IP queue instructions"

#========= Set Version Number ========
tcblock mbdpml 0x1000 0x8c9e 0x1900
#=====================================

#=======================================================
#
#
#;===================================================
#; mkstr+13
#;
#; MDI Structure Program
#;
#; This file contains the structure program and most of
#; the routines to generate dynamics and low rate data
#; products.
#;
#;---------------------------------------------------
#;
#; V1.0 -  9 Aug 95
#;      Constructed from the 60 second version (1.0).
#;
#; V1.1 - 23 Aug 95
#;      High Rate TLM handling
#;
#; V1.2 - 29 Sep 95
#;      Fix re-initialization of register lists at
#;      mode switch (Prime60 -> Prime30).
#;
#; V1.3 -  5 Oct 95
#;      1. Move List page from page 17 to page 14.
#;      2. Divide velocity data by 8 before downlinking.
#;      3. Added code to save LOI data in circular buffers.
#;
#; V1.5 -  16 Oct 95
#;      1. Implemented CALLBACK feature in Prime30
#;
#; V1.06 - 31 Oct 95
#;      1. The IP error dump register list overlapped the med-l wo
#;         register list. This caused the npix_total to be overwri
#;         and thus caused more segments to be downlinked than nec
#;         As the number of segments was initialized to 1, this re
#;         in negative segment numbers as the segment number is de
#;         after each call to LRDXFR.
#;         The med-l register list has been moved to 476-491.
#;      2. Register Initialization is controlled by a flag regiser
#;         Initialization is undertaken only if the flag is zero. 
#;         the problem of re-initialization when PRIME30 rusn for 
#;         time.
#;      3. Added a check at frame 20 to disable re-processing if a
#;         frmae 20 is recieved from the camera.
#;      4. Modified the velocity and Continuum (MKCNTNM) routines 
#;         to include header constructions and cropping. Thus Page
#;         contains the VELOCITY *data product*. Similarly, page 9
#;         the CONTINUUM data product.
#;      5. Modified LOI LRDXFR parameters for new LOI (LOI5) list.
#;      6. Modified VEL and CNTNM DPC's to reflect new CROP parame
#;
#; V1.07 -  3 Nov 95
#;      1. Changed source page for LOI-v CB and LOI-c CB data prod
#;         Now uses page 4 instead of page 1. Page 4 already had a
#;         from CNTNM instruction.
#;      2. The Velocity and Continuum data is used by 5k routines.
#;         it can not be processed into a data product until the 5
#;         is complete. Two new routines to convert Vel and Ic dat
#;         products have been created. The final product is direct
#;         page specified by IPRL_STR_VELDEST and IPRL_STR_ICDEST 
#;         These routines are called by FRM10, FRM20 and the DMPHR
#;      3. Moved temporary headers for vel and Ic data products to
#;         19:0x110000 and 19:0x110226 respectively (from 12:0x0F0
#;         12:0x0F226). This is to avoid conflicting with campaign
#;
#; V1.08 - 15 Nov 95
#;      1. Move HRDINIT register lists for VEL60, VEL30, Ic60, Ic3
#;         and CB-I to REGINI routine. These lists can then be mod
#;         without making any changes to the mkstr program.
#;      2. Move data products to offset 0x500 in the page.
#;
#; V1.09 - 21 Nov 95
#;      1. Purge pages 10, 12, 14 and 16.
#;
#; V1.10 - 29 Nov 95
#;      1. Use a single DPC code for circular buffer data products
#;         the dpc code does not reflect 30 or 60 second accumulat
#;         circular buffer data contains both types of data.
#;      2. Save accumulation period in $IPRL_STR_ACCTIM
#;      3. Set or clear 30 sec accumulation bit for med-l, loi-v a
#;         data products.
#;
#; V1.11 - 30 Nov 95
#;      1. Modified dispatch code in STR60 and STR30. The new code
#;         use register based jumps.
#;      2. Modified Register Dump and Error Dump dpc's.
#;
#; V1.12 -  1 Dec 95
#;      1. Chnaged size of MP and FB to 16k and Limb figure to 20k
#;         Corresponding changes to TWA RL's and list load instruc
#;         scitbls.src.
#;      2. Changed Flat Field Offset to 0 (from 0x20000).
#;      3. Changed List_Count parameter in RWBIN register lists fo
#;         Mag Proxy and Flux Budget.
#;
#; V1.13, V1.14, V1.15 - 18 Jan 96
#;      1. Check R3075 to determine VC2 status at frame 4 (not R30
#;      2. Remove SAVEMODE from FR07 processing.
#;      3. Construct Mag Proxy and Flux Budget data using 2 calls 
#;         for each. A single call generates more than 8K words of
#;         data which overflows IP internal buffer.
#;
#; V1.16 - 1 Mar 96 Dnyanesh Mathur
#;      1. The number of times LRDXFR is called for Med-l is deter
#;         the number of segments specified in the VWBIN list load
#;         in the scitbls.src control file.
#; V1.17 - 5 Mar 96 Dnyanesh Mathur
#;      1. Multiply L-Depth and Continuum by 2 for 30s observation
#;      2. Downlink of V and Ic enabled during ALT periods while i
#;         mode.
#;      3. The location of med-l changed to accomodate larger data
#;      4. Page 11 is used as a scratch page instead of 1 because 
#;         VWBIN list causes construction of med-l to take longer 
#;         the construction of other 5k data products to a time af
#;         becomes unavailable.
#;
#; V1.18 - 13 Mar 96 Dnyanesh Mathur
#;      1. The temporary register list used for constructing Ic da
#;         contained incorrect source and destination addresses. T
#;         word was not 0. 
#;
#; V1.19 -  2 Apr 96 Dnyanesh Mathur
#;      1. Change the order of 5k data product output. The uncompr
#;         data products are now downlinked first.
#;      2. Incorporate a routine to check frame number of the new 
#;         track camera errors.
#;      3. Allow line depth or continuum to be downlinked with vel
#;         dynamics mode.
#;      4. Purge List and Table pages in smaller chunks. Purge lar
#;         per minute. Move purges to frame 6.
#;
#; V1.20 -  4 Apr 96 Dnyanesh Mathur
#;      1. Replaced high rate downlink code by the code using the 
#;         routines.
#;          
#; V1.21 -  8 Apr 96 Dnyanesh Mathur
#;      1. Corrected Circular Buffer headers source address.
#;      2. Increased "count" parameter in LF TWA RL to 0x6000 (in 
#;      
#; V1.22 - 18 Apr 96 Dnyanesh Mathur
#;      1. FRMCHK call corrected. On error frmchk executed an END 
#;         it was invoked by a CALLQUE. It now always executes a R
#;         a register containing frame status (IPRL_STR_FRMBAD = 0
#;         frames). The call statement was moved to after setting 
#;      2. The MKCNTNM routine now extracts Si from Page 3 first b
#;         extracting Sd from page 2. Page 3 must be cleared first
#;         frame of Prime60 and Prime 30 write to page 3.
#;      3. Moved LOI-v constructions code to follow the medium-l c
#;         BADPIX does not have to be called twice. Similarly LOI-
#;         constructed immediately following the Flux-Budget const
#;         thereby avoiding two calls to FLATFLD. 
#;
#; V1.23 - 24 Apr 96 Dnyanesh Mathur
#;      1. 30sec Line depth scaled by a factor of two after constr
#;         continuum. At present the line-depth input to continuum
#;         is wrong for the 30s case.
#;      2. The number of time RWBIN is called is controlled by IPR
#;         register. Number of VWBIN calls is controlled by IPRL_S
#;      3. Skip Med-l LRDXFR if magnetogram downlinked in 5k.
#;      4. (Stop Mag downlink in 5k if dynamics mode is terminated
#;      5. (Change order of initialization to fix dpc problem)
#;      7. (Remove dump of camera header data in 5k)
#;      8. (Shift line-depth 1 bit before square-root lookup)
#;
#; V1.24 - 10 May 96 Dnyanesh Mathur
#;      1. Move Flat Field to page 12, Circular buffer to page 14.
#;
#;----------------------------------------------------------------
#QPROG_STR60::
#    GETHEADER  R0105
tcblock mbipmacl 0x0100    0x01EE 0x0069 
#;
#    SETREG     $IPRL_STR_VELXFR   $IPRL_STR_VEL60
tcblock mbipmacl 0x0102    0x0140 0x04C6 0x04C7 
#    SETREG     $IPRL_STR_LDXFR    $IPRL_STR_LD60
tcblock mbipmacl 0x0105    0x0140 0x04E0 0x04E1 
#    SETREG     $IPRL_STR_VHDR     $IPRL_STR_V60HDR
tcblock mbipmacl 0x0108    0x0140 0x0650 0x05E8 
#    SETREG     $IPRL_STR_ICHDR    $IPRL_STR_IC60HDR
tcblock mbipmacl 0x010B    0x0140 0x0656 0x05F8 
#    SETREG     $IPRL_STR_LDHDR    $IPRL_STR_LD60HDR
tcblock mbipmacl 0x010E    0x0140 0x068D 0x0681 
#    SETREG     $IPRL_STR_ACCTIM   60
tcblock mbipmacl 0x0111    0x0140 0x003C 0x003C 
#;   SETREG     $IPRL_STR_EP60     &CKFRM60
#;
#    CALLQUE    &QSR_STR_FRMCHK
tcblock mbipmacl 0x0114    0x01F8 0x0D00 
#    BRANCHIF   $IPRL_STR_FRMBAD   &CKFRM60
tcblock mbipmacl 0x0116    0x015A 0x06A7 0x011A 
#    END
tcblock mbipmacl 0x0119    0x01FC 
#;
#CKFRM60:
#    BRANCHEQ   R3072   1  &FRM01
tcblock mbipmacl 0x011A    0x01AE 0x0C00 0x0001 0x0180 
#    BRANCHEQ   R3072   2  &FRM02
tcblock mbipmacl 0x011E    0x01AE 0x0C00 0x0002 0x0181 
#    BRANCHEQ   R3072   4  &FRM04
tcblock mbipmacl 0x0122    0x01AE 0x0C00 0x0004 0x0186 
#    BRANCHEQ   R3072   5  &FRM05
tcblock mbipmacl 0x0126    0x01AE 0x0C00 0x0005 0x0199 
#    BRANCHEQ   R3072   6  &FRM06
tcblock mbipmacl 0x012A    0x01AE 0x0C00 0x0006 0x01A6 
#    BRANCHEQ   R3072   7  &FRM07
tcblock mbipmacl 0x012E    0x01AE 0x0C00 0x0007 0x01B6 
#    BRANCHEQ   R3072   8  &FRM08
tcblock mbipmacl 0x0132    0x01AE 0x0C00 0x0008 0x01BD 
#    BRANCHEQ   R3072  19  &FRM19  ; 
tcblock mbipmacl 0x0136    0x01AE 0x0C00 0x0013 0x01DD 
#    BRANCHEQ   R3072  20  &FRM20
tcblock mbipmacl 0x013A    0x01AE 0x0C00 0x0014 0x0256 
#
#    END
tcblock mbipmacl 0x013E    0x01FC 
#;
#;................................................................
#;
#QPROG_STR30::
#    GETHEADER  R0105
tcblock mbipmacl 0x013F    0x01EE 0x0069 
#;
#    SETREG     $IPRL_STR_VELXFR   $IPRL_STR_VEL30
tcblock mbipmacl 0x0141    0x0140 0x04C6 0x04CF 
#    SETREG     $IPRL_STR_LDXFR    $IPRL_STR_LD30
tcblock mbipmacl 0x0144    0x0140 0x04E0 0x04EA 
#    SETREG     $IPRL_STR_VHDR     $IPRL_STR_V30HDR
tcblock mbipmacl 0x0147    0x0140 0x0650 0x05F0 
#    SETREG     $IPRL_STR_ICHDR    $IPRL_STR_IC30HDR
tcblock mbipmacl 0x014A    0x0140 0x0656 0x0600 
#    SETREG     $IPRL_STR_LDHDR    $IPRL_STR_LD30HDR
tcblock mbipmacl 0x014D    0x0140 0x068D 0x0687 
#    SETREG     $IPRL_STR_ACCTIM   30
tcblock mbipmacl 0x0150    0x0140 0x003C 0x001E 
#;   SETREG     $IPRL_STR_EP30     &CKFRM30
#;
#    CALLQUE    &QSR_STR_FRMCHK
tcblock mbipmacl 0x0153    0x01F8 0x0D00 
#    BRANCHIF   $IPRL_STR_FRMBAD   &CKFRM30
tcblock mbipmacl 0x0155    0x015A 0x06A7 0x0159 
#    END
tcblock mbipmacl 0x0158    0x01FC 
#;
#CKFRM30:
#    CALLQUE    $QSR_CB_CALLBACK
tcblock mbipmacl 0x0159    0x01F8 0x0FFA 
#;
#    BRANCHEQ   R3072   1  &FRM01
tcblock mbipmacl 0x015B    0x01AE 0x0C00 0x0001 0x0180 
#    BRANCHEQ   R3072   2  &FRM02
tcblock mbipmacl 0x015F    0x01AE 0x0C00 0x0002 0x0181 
#    BRANCHEQ   R3072   4  &FRM04
tcblock mbipmacl 0x0163    0x01AE 0x0C00 0x0004 0x0186 
#    BRANCHEQ   R3072   5  &FRM05
tcblock mbipmacl 0x0167    0x01AE 0x0C00 0x0005 0x0199 
#    BRANCHEQ   R3072   6  &FRM06
tcblock mbipmacl 0x016B    0x01AE 0x0C00 0x0006 0x01A6 
#    BRANCHEQ   R3072   7  &FRM07
tcblock mbipmacl 0x016F    0x01AE 0x0C00 0x0007 0x01B6 
#    BRANCHEQ   R3072   8  &FRM08
tcblock mbipmacl 0x0173    0x01AE 0x0C00 0x0008 0x01BD 
#    BRANCHEQ   R3072   9  &FRM09   
tcblock mbipmacl 0x0177    0x01AE 0x0C00 0x0009 0x01D2 
#    BRANCHEQ   R3072  10  &FRM10
tcblock mbipmacl 0x017B    0x01AE 0x0C00 0x000A 0x01E8 
#
#    END
tcblock mbipmacl 0x017F    0x01FC 
#;
#;................................................................
#FRM01:
#    END
tcblock mbipmacl 0x0180    0x01FC 
#;................................................
#FRM02:
#    AVGTEMPS   3:0x00134  12
tcblock mbipmacl 0x0181    0x0186 0x0134 0x1800 0x000C 
#    END
tcblock mbipmacl 0x0185    0x01FC 
#;................................................
#FRM04:
#;    If HR board hang problem has been detected at frame 20, rese
#; and re-start the downlink. Reset done at this point allows all 
#; to be completed but still leave enough time to downlink the ful
#; image. Part of continuum image will however be lost.
#;    This code should execute if 
#;      in dynamics mode
#;      HR problem detected at Frame 20.
#;
#    BRANCHIF  R3075   &DONE04    ; skip if not in Dynamics (Check
tcblock mbipmacl 0x0186    0x015A 0x0C03 0x0195 
#    BRANCHNR  0x4000  &DONE04    ; Page 8 busy-presumably sending
tcblock mbipmacl 0x0189    0x01A6 0x4000 0x0195 
#    BRANCHEQ  R0081   0  &DONE04 ; No HR problem; downlink restar
tcblock mbipmacl 0x018C    0x01AE 0x0051 0x0000 0x0195 
#    SAVEMODE                     ; IP Reset
tcblock mbipmacl 0x0190    0x01E6 
#    SETREG    R0082   1          ; Set flag for Frame 5 to initia
tcblock mbipmacl 0x0191    0x0140 0x0052 0x0001 
#    END
tcblock mbipmacl 0x0194    0x01FC 
#DONE04:
#    SETREG    R0082   0          ; Don't initiate downlink at fra
tcblock mbipmacl 0x0195    0x0140 0x0052 0x0000 
#    END
tcblock mbipmacl 0x0198    0x01FC 
#;................................................
#FRM05:
#    BRANCHIF  R0082   &DONE05
tcblock mbipmacl 0x0199    0x015A 0x0052 0x01A2 
#    START2HR  0x49  0x4000  0x4800  R518  R534
tcblock mbipmacl 0x019C    0x019A 0x0049 0x4000 0x4800 \
                                0x0206 0x0216 
#DONE05:
#    SETREG    R0082   0
tcblock mbipmacl 0x01A2    0x0140 0x0052 0x0000 
#    END
tcblock mbipmacl 0x01A5    0x01FC 
#;................................................
#FRM06:
#; All of pages 10 (flat field table) and 12 (circular
#; buffer data) are purged here. Purge block length is
#; set to 16 (=128k words) and loop count is 8.
#; 8 * 128k = 1 MW
#; This processing should take ~1.31 seconds
#;  (2 pages * (82ms/page * 16blks/page)) 
#;
#    SETREG     R512  128
tcblock mbipmacl 0x01A6    0x0140 0x0200 0x0080 
#    SETREG     R159  1
tcblock mbipmacl 0x01A9    0x0140 0x009F 0x0001 
#PURG1012:    
#    PURGELST   R152               ; Purge Page 12
tcblock mbipmacl 0x01AC    0x0190 0x0098 
#    ADDREGD    R512  0xFFFF       ; R512 = R512 - 1
tcblock mbipmacl 0x01AE    0x01BC 0x0200 0xFFFF 
#    BRANCHNE   R512  0      &PURG1012
tcblock mbipmacl 0x01B1    0x01B0 0x0200 0x0000 0x01AC 
#;
#    END
tcblock mbipmacl 0x01B5    0x01FC 
#;................................................
#FRM07:
#    SAVEMODE   
tcblock mbipmacl 0x01B6    0x01E6 
#    NOOP
tcblock mbipmacl 0x01B7    0x01DE 
#    COPYTAB    R1116             ; Copy Vel Table
tcblock mbipmacl 0x01B8    0x01B4 0x045C 
#    COPYTAB    R1124             ; Copy Reciprocal Table
tcblock mbipmacl 0x01BA    0x01B4 0x0464 
#    END
tcblock mbipmacl 0x01BC    0x01FC 
#;
#;................................................
#FRM08:
#    SETREG     R512   128
tcblock mbipmacl 0x01BD    0x0140 0x0200 0x0080 
#    SETREG     R143   1
tcblock mbipmacl 0x01C0    0x0140 0x008F 0x0001 
#    SETREG     R135   1
tcblock mbipmacl 0x01C3    0x0140 0x0087 0x0001 
#PURG1416:
#    PURGELST   R136               ; Purge Page 14
tcblock mbipmacl 0x01C6    0x0190 0x0088 
#    PURGETAB   R128               ; Purge Page 16
tcblock mbipmacl 0x01C8    0x0194 0x0080 
#    ADDREGD    R512  0xFFFF       ; R512 = R512 - 1
tcblock mbipmacl 0x01CA    0x01BC 0x0200 0xFFFF 
#    BRANCHNE   R512  0      &PURG1416
tcblock mbipmacl 0x01CD    0x01B0 0x0200 0x0000 0x01C6 
#;
#    END
tcblock mbipmacl 0x01D1    0x01FC 
#;................................................
#FRM09:
#    COPYREG    $IPRL_STR_CADC30   $IPRL_STR_CADC
tcblock mbipmacl 0x01D2    0x0142 0x067E 0x067F 
#    SETREG     $IPRL_STR_SCLF     2
tcblock mbipmacl 0x01D5    0x0140 0x0680 0x0002 
#    CALLQUE    &MKVEL
tcblock mbipmacl 0x01D8    0x01F8 0x02A1 
#    CALLQUE    &MKLDPTH
tcblock mbipmacl 0x01DA    0x01F8 0x02B5 
#    END
tcblock mbipmacl 0x01DC    0x01FC 
#;................................................
#FRM19:
#    COPYREG    $IPRL_STR_CADC60   $IPRL_STR_CADC
tcblock mbipmacl 0x01DD    0x0142 0x067D 0x067F 
#    SETREG     $IPRL_STR_SCLF     1
tcblock mbipmacl 0x01E0    0x0140 0x0680 0x0001 
#    CALLQUE    &MKVEL
tcblock mbipmacl 0x01E3    0x01F8 0x02A1 
#    CALLQUE    &MKLDPTH
tcblock mbipmacl 0x01E5    0x01F8 0x02B5 
#    END
tcblock mbipmacl 0x01E7    0x01FC 
#;................................................
#FRM10:
#    BRANCHIF   $IPRL_STR_FRMCHK  &DO_FRM10
tcblock mbipmacl 0x01E8    0x015A 0x05C0 0x01F1 
#    THROW      0xFBAD
tcblock mbipmacl 0x01EB    0x01EA 0xFBAD 
#    SETREG     $IPRL_STR_FRMCHK   0
tcblock mbipmacl 0x01ED    0x0140 0x05C0 0x0000 
#    END
tcblock mbipmacl 0x01F0    0x01FC 
#;
#DO_FRM10:
#    SETREG     $IPRL_STR_FRMCHK  1
tcblock mbipmacl 0x01F1    0x0140 0x05C0 0x0001 
#    LRDINIT    0
tcblock mbipmacl 0x01F4    0x018E 0x0000 
#    MOVBLK     0:0x0002D  5:0x11491C  4L    ; Ref time -> LOI-c
tcblock mbipmacl 0x01F6    0x0164 0x002D 0x0000 0x491C \
                                0x2811 0x0004 0x0000 
#    MOVBLK     0:0x0002D  7:0x11473C  4L    ; Ref Time -> LOI-v
tcblock mbipmacl 0x01FD    0x0164 0x002D 0x0000 0x473C \
                                0x3811 0x0004 0x0000 
#;
#    CALLQUE    &MKCNTNM
tcblock mbipmacl 0x0204    0x01F8 0x02C9 
#;
#; Multiply Continuum and Line Depth images by 2 to make the
#; magnitude of the 30sec versions same as those for 60s.
#    CALLQUE    &SCL_IC
tcblock mbipmacl 0x0206    0x01F8 0x02EE 
#    CALLQUE    &SCL_LD                     
tcblock mbipmacl 0x0208    0x01F8 0x0307 
#;
#; Check if dynamics mode
#    BRANCHEQ   R3076    1   &SETCF  ; Cmpg Mode; Skip V+Ic D/L 
tcblock mbipmacl 0x020A    0x01AE 0x0C04 0x0001 0x0235 
#    BRANCHIF   $IPRF_STR_CF &CHKALT
tcblock mbipmacl 0x020E    0x015A 0x05A9 0x0216 
#    SETREG     $IPRF_STR_CF 0
tcblock mbipmacl 0x0211    0x0140 0x05A9 0x0000 
#    GOTO       &ALTHRDL
tcblock mbipmacl 0x0214    0x0156 0x0231 
#;
#; The state of flags is preserved for ALT repeats
#CHKALT:
#    BRANCHNE   $IPRL_STR_COUNT  0   &CHKFLG 
tcblock mbipmacl 0x0216    0x01B0 0x0544 0x0000 0x0226 
#    COPYREG    $IPRL_STR_ALTRPTS    $IPRL_STR_COUNT  
tcblock mbipmacl 0x021A    0x0142 0x0545 0x0544 
#    ADDREGD    $IPRL_STR_COUNT      1
tcblock mbipmacl 0x021D    0x01BC 0x0544 0x0001 
#    COPYREG    R3075    $IPRL_STR_VC
tcblock mbipmacl 0x0220    0x0142 0x0C03 0x0546 
#    COPYREG    R3077    $IPRL_STR_MAGHR
tcblock mbipmacl 0x0223    0x0142 0x0C05 0x0547 
#;
#CHKFLG:
#    ADDREGD    $IPRL_STR_COUNT   0xFFFF
tcblock mbipmacl 0x0226    0x01BC 0x0544 0xFFFF 
#    BRANCHEQ   R3075    0   &DO5K   ; skip hi rate D/L if VC = 0
tcblock mbipmacl 0x0229    0x01AE 0x0C03 0x0000 0x0238 
#    BRANCHEQ   R3077    1   &DO5K   ; MAG D/L in 160K
tcblock mbipmacl 0x022D    0x01AE 0x0C05 0x0001 0x0238 
#;
#ALTHRDL:
#    CALLQUE    &DMPHR
tcblock mbipmacl 0x0231    0x01F8 0x0553 
#    GOTO       &DO5K
tcblock mbipmacl 0x0233    0x0156 0x0238 
#;
#SETCF:
#    SETREG     $IPRF_STR_CF   1
tcblock mbipmacl 0x0235    0x0140 0x05A9 0x0001 
#;
#DO5K:
#    CALLQUE    &STRDPS
tcblock mbipmacl 0x0238    0x01F8 0x0320 
#    SETREGS    $IPRL_STR_VELDEST  2 5:0x00500 
tcblock mbipmacl 0x023A    0x01B2 0x0640 0x0002 0x0500 \
                                0x2800 
#    CALLQUE    &MKVELDP
tcblock mbipmacl 0x023F    0x01F8 0x045C 
#    SETREGS    $IPRL_STR_ICDEST   2 7:0x00500
tcblock mbipmacl 0x0241    0x01B2 0x0642 0x0002 0x0500 \
                                0x3800 
#    CALLQUE    &GENICDP
tcblock mbipmacl 0x0246    0x01F8 0x0496 
#    SETREGS    $IPRL_STR_ICDEST   2 6:0x00500
tcblock mbipmacl 0x0248    0x01B2 0x0642 0x0002 0x0500 \
                                0x3000 
#    CALLQUE    &GENLDDP
tcblock mbipmacl 0x024D    0x01F8 0x04A6 
#;
#    SETREG     $IPRL_CB_ADDR  0
tcblock mbipmacl 0x024F    0x0140 0x0C20 0x0000 
#    SETREG     $IPRL_STR_FRMCHK   0
tcblock mbipmacl 0x0252    0x0140 0x05C0 0x0000 
#
#    END
tcblock mbipmacl 0x0255    0x01FC 
#;................................................
#FRM20:
#    BRANCHIF   $IPRL_STR_FRMCHK  &DO_FRM20
tcblock mbipmacl 0x0256    0x015A 0x05C0 0x025F 
#    THROW      0xFBAD
tcblock mbipmacl 0x0259    0x01EA 0xFBAD 
#    SETREG     $IPRL_STR_FRMCHK   0
tcblock mbipmacl 0x025B    0x0140 0x05C0 0x0000 
#    END
tcblock mbipmacl 0x025E    0x01FC 
#;
#DO_FRM20:
#    SETREG     $IPRL_STR_FRMCHK  1
tcblock mbipmacl 0x025F    0x0140 0x05C0 0x0001 
#    LRDINIT    0
tcblock mbipmacl 0x0262    0x018E 0x0000 
#    MOVBLK     0:0x0002D  5:0x11491C  4L    ; Ref time -> LOI-c
tcblock mbipmacl 0x0264    0x0164 0x002D 0x0000 0x491C \
                                0x2811 0x0004 0x0000 
#    MOVBLK     0:0x0002D  7:0x11473C  4L    ; Ref Time -> LOI-v
tcblock mbipmacl 0x026B    0x0164 0x002D 0x0000 0x473C \
                                0x3811 0x0004 0x0000 
#    COPYREG    $IPRL_STR_CADC60 $IPRL_STR_CADC
tcblock mbipmacl 0x0272    0x0142 0x067D 0x067F 
#    CALLQUE    &MKCNTNM
tcblock mbipmacl 0x0275    0x01F8 0x02C9 
#    BRANCHIF   R3075    &DP5K           ; skip hi rate if VC = 0
tcblock mbipmacl 0x0277    0x015A 0x0C03 0x0286 
#    BRANCHIF   $IPRF_MAG_HR    &V_I_DL  ; D/L stored mags if IPRF
tcblock mbipmacl 0x027A    0x015A 0x05A8 0x0284 
#    CALLQUE    &QSR_MAG_HRDL
tcblock mbipmacl 0x027D    0x01F8 0x0C00 
#    BRANCHIF   $IPRF_MAG_HR    &V_I_DL  ; If all mags done, d/l v
tcblock mbipmacl 0x027F    0x015A 0x05A8 0x0284 
#    GOTO       &DP5K
tcblock mbipmacl 0x0282    0x0156 0x0286 
#V_I_DL:
#    CALLQUE    &DMPHR
tcblock mbipmacl 0x0284    0x01F8 0x0553 
#DP5K:
#    CALLQUE    &STRDPS
tcblock mbipmacl 0x0286    0x01F8 0x0320 
#    SETREGS    $IPRL_STR_VELDEST  2 5:0x00500 
tcblock mbipmacl 0x0288    0x01B2 0x0640 0x0002 0x0500 \
                                0x2800 
#    CALLQUE    &MKVELDP
tcblock mbipmacl 0x028D    0x01F8 0x045C 
#    SETREGS    $IPRL_STR_ICDEST   2 7:0x00500
tcblock mbipmacl 0x028F    0x01B2 0x0642 0x0002 0x0500 \
                                0x3800 
#    CALLQUE    &GENICDP
tcblock mbipmacl 0x0294    0x01F8 0x0496 
#    SETREGS    $IPRL_STR_ICDEST   2 6:0x00500
tcblock mbipmacl 0x0296    0x01B2 0x0642 0x0002 0x0500 \
                                0x3000 
#    CALLQUE    &GENLDDP
tcblock mbipmacl 0x029B    0x01F8 0x04A6 
#;
#    SETREG     $IPRL_STR_FRMCHK   0
tcblock mbipmacl 0x029D    0x0140 0x05C0 0x0000 
#    END
tcblock mbipmacl 0x02A0    0x01FC 
#;................................................
#;
#MKVEL:
#; Velocity:
#;       Source Page Sa   : Page 0, Offset 1300
#;       Source Page Sc   : Page 1, Offset 1300
#;       Destination Page : Page 5, Offset 0
#;       Shift Count      :  3  (Sum of 4 images)
#;       Block Count      :  127
#;
#;
#;   SETREGS    R800     8   0:0x00514  1:0x00514  5:0x00000  3 12
#;
#    COPYRI2D   $IPRL_STR_VELXFR  $IPRL_STR_VELWRK  $#IPRL_STR_VEL
tcblock mbipmacl 0x02A1    0x01AC 0x04C6 0x04BE 0x0008 
#    VLCTY      $IPRL_STR_VELWRK
tcblock mbipmacl 0x02A5    0x017C 0x04BE 
#;
#;   SETREGS  R512  6  1 0x0000  0x2000  0xE4  0xCFFF 0xFF3A
#    COPYRI2D $IPRL_STR_VHDR    R512  6
tcblock mbipmacl 0x02A7    0x01AC 0x0650 0x0200 0x0006 
#;   COPYRD2D $IPRL_STR_V60HDR  R512  6
#    HRDINIT  R512
tcblock mbipmacl 0x02AB    0x019C 0x0200 
#    MOVBLK   4:0x00000  19:0x110000  0x00226L       ; Save Header
tcblock mbipmacl 0x02AD    0x0164 0x0000 0x2000 0x0000 \
                                0x9811 0x0226 0x0000 
#;
#    RTNQUE
tcblock mbipmacl 0x02B4    0x01FA 
#;
#;.......................
#;
#MKLDPTH:
#;
#; Line Depth:
#;       Source Page Sa   : Page 0, Offset 1300
#;       Source Page Sc   : Page 1, Offset 1300
#;       Destination Page : Page 6, Offset 0
#;       Shift Count      :  16  
#;       Block Count      : 127 (Process data per call ~150ms)
#;       Lookup Segment   :  8  (Depends on SQRT table location)
#;
#;   SETREGS   R808 9  0:0x00514  1:0x00514  6:0x00000  16  127  8
#;
#    COPYRI2D $IPRL_STR_LDHDR     R512  6
tcblock mbipmacl 0x02B5    0x01AC 0x068D 0x0200 0x0006 
#    HRDINIT  R512
tcblock mbipmacl 0x02B9    0x019C 0x0200 
#    MOVBLK   4:0x00000  19:0x110500  0x00226L
tcblock mbipmacl 0x02BB    0x0164 0x0000 0x2000 0x0500 \
                                0x9811 0x0226 0x0000 
#;
#    COPYRI2D  $IPRL_STR_LDXFR  $IPRL_STR_LDWRK  $#IPRL_STR_LDWRK
tcblock mbipmacl 0x02C2    0x01AC 0x04E0 0x04D7 0x0009 
#    LDEPTH    $IPRL_STR_LDWRK
tcblock mbipmacl 0x02C6    0x017E 0x04D7 
#;
#    RTNQUE
tcblock mbipmacl 0x02C8    0x01FA 
#;
#;.....................................................
#;      
#MKCNTNM:
#;
#; Continuum:
#;
#;
#;   SETREGS  R528  6  1 0x0000  0x2000  0xE2  0xCFFF 0xFF3B
#    COPYRI2D $IPRL_STR_ICHDR     R512  6
tcblock mbipmacl 0x02C9    0x01AC 0x0656 0x0200 0x0006 
#    HRDINIT  R512
tcblock mbipmacl 0x02CD    0x019C 0x0200 
#    MOVBLK   4:0x00000  19:0x110226  0x00226L
tcblock mbipmacl 0x02CF    0x0164 0x0000 0x2000 0x0226 \
                                0x9811 0x0226 0x0000 
#;
#;   Extract 1024^2 Si from page 3 to page 4
#;      Source Page       : page 3, Offset 1300
#;      Destination       : Page 4, Offset 550
#;      X-Length          : 1024
#;      Y-Length          : 1024
#;      Row Length        : 1040
#;      Global Offset Reg.:   69
#;
#;   SETREGS  R819  8   1300 0x1800  4:0x00226 1024  1024  1040  6
#    COPYRD2D $IPRL_STR_EXTRSI  R811  8
tcblock mbipmacl 0x02D6    0x0144 0x0620 0x032B 0x0008 
#    EXTRACT  R811
tcblock mbipmacl 0x02DA    0x017A 0x032B 
#;
#; Extract 1024^2 Sd from page 2 to page 11 
#;      Source Page       : page 2, Offset 1300
#;      Destination       : Page 11, Offset 0
#;      X-Length          : 1024
#;      Y-Length          : 1024
#;      Row Length        : 1040
#;      Global Offset Reg.:   69
#;
#;   SETREGS  R811  8   2:0x00514 11:0x00000  1024  1024  1040  69
#    COPYRD2D $IPRL_STR_EXTRSD  R811  8
tcblock mbipmacl 0x02DC    0x0144 0x0618 0x032B 0x0008 
#    EXTRACT  R811
tcblock mbipmacl 0x02E0    0x017A 0x032B 
#;
#;   Construct Continuum image in Page 7, from Sd, Si and Ld
#;     Source (Si)       : Page 4, Offset 0
#;     Source (Ld)       : Page 6, Offset 0
#;     Source (Sd)       : Page 11, Offset 0
#;     Destination       : Page 7, Offset 0
#;     Block Count       :  63 (1/2 image processed, each call < 3
#;     Cadc              : 200
#;
#;   SETREGS  R821  10  4:0x00226 6:0x00000 11:0x00000 7:0x00000 6
#    COPYRD2D $IPRL_STR_MKIC  R811 10
tcblock mbipmacl 0x02E2    0x0144 0x0628 0x032B 0x000A 
#    COPYREG  $IPRL_STR_CADC  R820         ; Use Cadc offset set b
tcblock mbipmacl 0x02E6    0x0142 0x067F 0x0334 
#    CNTNM    R811
tcblock mbipmacl 0x02E9    0x0182 0x032B 
#    CNTNM    R811
tcblock mbipmacl 0x02EB    0x0182 0x032B 
#;
#    RTNQUE
tcblock mbipmacl 0x02ED    0x01FA 
#;
#;.......................
#SCL_IC:
#    SETREGS  R811  8   7:0x00000 4:0x00000 0x100000L  2  16
tcblock mbipmacl 0x02EE    0x01B2 0x032B 0x0008 0x0000 \
                                0x3800 0x0000 0x2000 0x0000 \
                                0x0010 0x0002 0x0010 
#    SCALE    R811
tcblock mbipmacl 0x02F9    0x01BE 0x032B 
#    SETREGS  R811  6   4:0x00000 7:0x00000 0x100000L 
tcblock mbipmacl 0x02FB    0x01B2 0x032B 0x0006 0x0000 \
                                0x2000 0x0000 0x3800 0x0000 \
                                0x0010 
#    MOVBLKI  R811  
tcblock mbipmacl 0x0304    0x0166 0x032B 
#    RTNQUE
tcblock mbipmacl 0x0306    0x01FA 
#;
#;.......................
#SCL_LD:
#    SETREGS  R811  8   6:0x00000 4:0x00000 0x100000L  2  16
tcblock mbipmacl 0x0307    0x01B2 0x032B 0x0008 0x0000 \
                                0x3000 0x0000 0x2000 0x0000 \
                                0x0010 0x0002 0x0010 
#    SCALE    R811
tcblock mbipmacl 0x0312    0x01BE 0x032B 
#    SETREGS  R811  6   4:0x00000 6:0x00000 0x100000L 
tcblock mbipmacl 0x0314    0x01B2 0x032B 0x0006 0x0000 \
                                0x2000 0x0000 0x3000 0x0000 \
                                0x0010 
#    MOVBLKI  R811  
tcblock mbipmacl 0x031D    0x0166 0x032B 
#    RTNQUE
tcblock mbipmacl 0x031F    0x01FA 
#;
#;.......................
#;
#STRDPS:
#;
#MKMEDL: 
#; Construct Medium-l
#;
#; This routine assumes that X and Y vectors as well as a Vector w
#; bin list for Solar radius of 3264 units has already been loaded
#; 14:0x07000. Such a bin list consists of 29 bins generating 1450
#; data. 
#;
#; Construct vector weighted binned image  
#;  Velocity Page        5
#;  Destination Address  7:0x110000
#;  List Count           0
#;  List Count           6  (*5=30; 5 bins processed on last call)
#;  VWBIN List Address   14:0x07000
#;  Global Offset Reg.   69
#;
#; Velocity  -> Bad Pixel Removed  ->  Med-l
#;    5      ->        4           ->  7:0x110000
#;
#    COPYRD2D   R3052  R1092  8
tcblock mbipmacl 0x0320    0x0144 0x0BEC 0x0444 0x0008 
#    BADPIX     R1092
tcblock mbipmacl 0x0324    0x01D2 0x0444 
#;
#    COPYRD2D   R1072  R900   8
tcblock mbipmacl 0x0326    0x0144 0x0430 0x0384 0x0008 
#    CALLQUE    &DO_VWBIN                  ; Calls VWBIN IPRL_STR_
tcblock mbipmacl 0x032A    0x01F8 0x04E9 
#;
#;........................
#;
#; Use the bad pixel corrected velocity in page 4
#; LOI-v
#;      Source Page:          4
#;      Destination Addr.:    7:0x114740
#;      List Pointer:         0
#;      List Count:           5
#;      List Addr.:          14:0x030000
#;      Offset Reg:          69
#;
#;   SETREGS  $IPRL_STR_MKLOIV 8 0x2000 7:0x114740 0 45 14:0x03400
#    _IRBIN   $IPRL_STR_MKLOIV
tcblock mbipmacl 0x032C    0x81A4 0x048C 
#;
#; CB-v
#;   SETREGS  R512  6  4:0x00001  0x3000 0  0xCFFF  0xFF2E
#    MOVBLK   19:0x110000 11:0x00000 0x0226L
tcblock mbipmacl 0x032E    0x0164 0x0000 0x9811 0x0000 \
                                0x5800 0x0226 0x0000 
#    COPYRD2D $IPRL_STR_CBVHDR    R512  6
tcblock mbipmacl 0x0335    0x0144 0x065C 0x0200 0x0006 
#    HRDINIT  R512
tcblock mbipmacl 0x0339    0x019C 0x0200 
#;
#    SETREGS  R512  6  6:0x00000  14:0x08B000  0x0228L
tcblock mbipmacl 0x033B    0x01B2 0x0200 0x0006 0x0000 \
                                0x3000 0xB000 0x7008 0x0228 \
                                0x0000 
#    DAT2LST  R512
tcblock mbipmacl 0x0344    0x01C4 0x0200 
#    COPYCB   $IPRL_STR_LOIV2CB
tcblock mbipmacl 0x0346    0x01CA 0x05B2 
#;........................
#;
#MKGP:
#;
#; Construct Golf Proxy
#; (RWBinned Line Depth - 11289 pixels)
#;
#;
#    COPYRD2D   R3040  R1100  12
tcblock mbipmacl 0x0348    0x0144 0x0BE0 0x044C 0x000C 
#    FLATFLD    R1100
tcblock mbipmacl 0x034C    0x01CC 0x044C 
#;
#    COPYRD2D   R1024  R900  8
tcblock mbipmacl 0x034E    0x0144 0x0400 0x0384 0x0008 
#    CALLQUE    &DO_RWBIN                  ; Calls RWBIN IPRL_STR_
tcblock mbipmacl 0x0352    0x01F8 0x04F7 
#;
#    COPYRD2D   R1032  R900  8
tcblock mbipmacl 0x0354    0x0144 0x0408 0x0384 0x0008 
#    CALLQUE    &DO_RWBIN
tcblock mbipmacl 0x0358    0x01F8 0x04F7 
#;
#;
#;..........................
#;
#MKFB:
#;
#; Construct Flux Budget 
#; (RWBinned Continuum)
#;                               
#    COPYRD2D   R3060  R1080  12
tcblock mbipmacl 0x035A    0x0144 0x0BF4 0x0438 0x000C 
#    FLATFLD    R1080
tcblock mbipmacl 0x035E    0x01CC 0x0438 
#
#    COPYRD2D   R1040  R900  8
tcblock mbipmacl 0x0360    0x0144 0x0410 0x0384 0x0008 
#    CALLQUE    &DO_RWBIN
tcblock mbipmacl 0x0364    0x01F8 0x04F7 
#;
#    COPYRD2D   R1048  R900  8
tcblock mbipmacl 0x0366    0x0144 0x0418 0x0384 0x0008 
#    CALLQUE    &DO_RWBIN
tcblock mbipmacl 0x036A    0x01F8 0x04F7 
#;
#;...........................
#;
#; Use flat fielded continuum image in page 4
#; LOI-c
#;      Source Page:          1
#;      Destination Addr.:    5:0x114920
#;      List Pointer:         0
#;      List Count:           5
#;      List Addr.:          14:0x030000
#;      Offset Reg:          69
#;
#;
#;   SETREGS  $IPRL_STR_MKLOIC 8 0x2000 5:0x114920 0 45 14:0x03000
#    _IRBIN    $IPRL_STR_MKLOIC
tcblock mbipmacl 0x036C    0x81A4 0x0494 
#;
#; CB-c
#;   SETREGS  R512  6  4:0x00001  0x3000 0  0xCFFF  0xFF2F
#    MOVBLK   19:0x110000 11:0x00000 0x0226L
tcblock mbipmacl 0x036E    0x0164 0x0000 0x9811 0x0000 \
                                0x5800 0x0226 0x0000 
#    COPYRD2D $IPRL_STR_CBIHDR    R512  6
tcblock mbipmacl 0x0375    0x0144 0x0662 0x0200 0x0006 
#    HRDINIT  R512
tcblock mbipmacl 0x0379    0x019C 0x0200 
#;
#    SETREGS  R512  6  6:0x00000  14:0x066000  0x0228L
tcblock mbipmacl 0x037B    0x01B2 0x0200 0x0006 0x0000 \
                                0x3000 0x6000 0x7006 0x0228 \
                                0x0000 
#    DAT2LST  R512
tcblock mbipmacl 0x0384    0x01C4 0x0200 
#    COPYCB   $IPRL_STR_LOIC2CB
tcblock mbipmacl 0x0386    0x01CA 0x05AA 
#;...........................
#;
#MKLF:
#;
#; Construct Limb Figure
#;
#; Construct 1st Limb Figure from image in page 7 into page 6 (110
#    ;SETREGS   R856    8  0x5800   6:0x110000  0  2000 14:0x03000
#;   ;SETREGS   R856    8  0x3800   6:0x110000  0  2000 14:0x03000
#;
#    COPYRD2D  R1056  R856  8
tcblock mbipmacl 0x0388    0x0144 0x0420 0x0358 0x0008 
#    CROP      R856
tcblock mbipmacl 0x038C    0x0178 0x0358 
#;   TWAVG     R864
#;
#; Construct 2nd Limb Figure from image in page 7 into page 6 (114
#    ;SETREGS   R880    8  0x5000   6:0x115000  0  2000 14:0x05000
#    ;SETREGS   R880    8  0x3800   6:0x115000  0  2000 14:0x05000
#;
#    COPYRD2D  R1064  R880  8
tcblock mbipmacl 0x038E    0x0144 0x0428 0x0370 0x0008 
#    CROP      R880
tcblock mbipmacl 0x0392    0x0178 0x0370 
#;   TWAVG     R888
#;
#;
#    ; ADDREGD    R3583    2
#    ; GOTOREG    R3583
#;
#    GOTO      &SCITLM    ; Start 5k data downlink
tcblock mbipmacl 0x0394    0x0156 0x0396 
#;
#;
#;--------------------------------------------------------
#; Program to downlink data via the 5k channel
#;
#;
#SCITLM:
#;
#; Structure Mode Telemetry output program
#; --------- ---- --------- ------ -------
#;  (Uses Registers R210-R293)
#;
#; Get System Time From Page 0
#;   LRDINIT  0x1800
#    NOOP
tcblock mbipmacl 0x0396    0x01DE 
#    NOOP
tcblock mbipmacl 0x0397    0x01DE 
#    NOOP
tcblock mbipmacl 0x0398    0x01DE 
#    NOOP
tcblock mbipmacl 0x0399    0x01DE 
#    NOOP
tcblock mbipmacl 0x039A    0x01DE 
#;
#; Error log output (if needed)
#    COPYELOG  $IPRL_STR_ERRDMP+4                      ; R464
tcblock mbipmacl 0x039B    0x01EC 0x01D0 
#    BRANCHIF  $IPRL_STR_ERRDMP+6  &REGDMP             ; R466
tcblock mbipmacl 0x039D    0x015A 0x01D2 0x03A2 
#    LRDXFR    $IPRL_STR_ERRDMP
tcblock mbipmacl 0x03A0    0x0198 0x01CC 
#;
#; Camera Headers Dump
#; CHDUMP:
#;     BRANCHIF  $IPRL_STR_CAMHDMP   &REGDMP
#;    _LRDXFR    $IPRL_STR_CAMHDR
#;
#;
#; Register Block Data Product 
#;
#REGDMP:
#    CALLQUE  &REGDP
tcblock mbipmacl 0x03A2    0x01F8 0x0505 
#;
#;
#; LOI-v
#;   Register List R416-R429 is initialized by Irregular Bin load
#;   command in the control file loi3b.src
#;
#    COPYRD2D R416  $IPRL_STR_LVLRDP_W  16
tcblock mbipmacl 0x03A4    0x0144 0x01A0 0x049C 0x0010 
#    SETREG   $IPRL_STR_DPCW    0xFF3F
tcblock mbipmacl 0x03A8    0x0140 0x05BC 0xFF3F 
#    REGAND   $IPRL_STR_LVLRDP_W+10  $IPRL_STR_DPCW  $IPRL_STR_DPC
tcblock mbipmacl 0x03AB    0x0150 0x04A6 0x05BC 0x05BD 
#    BRANCHEQ $IPRL_STR_ACCTIM     60    &DOLVLRD
tcblock mbipmacl 0x03AF    0x01AE 0x003C 0x003C 0x03BA 
#    SETREG   $IPRL_STR_DPCW    0x0040                 ; Set 30s D
tcblock mbipmacl 0x03B3    0x0140 0x05BC 0x0040 
#    REGOR    $IPRL_STR_DPCW+1  $IPRL_STR_DPCW  $IPRL_STR_LVLRDP_W
tcblock mbipmacl 0x03B6    0x2150 0x05BD 0x05BC 0x04A6 
#DOLVLRD:
#    LRDXFR   $IPRL_STR_LVLRDP_W
tcblock mbipmacl 0x03BA    0x0198 0x049C 
#;
#;
#; LOI-c
#;   Register List R430-R443 is initialized by Irregular Bin load
#;   command in the control file loi3b.src
#;
#    COPYRD2D R430  $IPRL_STR_LCLRDP_W  16
tcblock mbipmacl 0x03BC    0x0144 0x01AE 0x04AC 0x0010 
#    SETREG   $IPRL_STR_DPCW    0xFF3F
tcblock mbipmacl 0x03C0    0x0140 0x05BC 0xFF3F 
#    REGAND   $IPRL_STR_LCLRDP_W+10  $IPRL_STR_DPCW  $IPRL_STR_DPC
tcblock mbipmacl 0x03C3    0x0150 0x04B6 0x05BC 0x05BD 
#    BRANCHEQ $IPRL_STR_ACCTIM     60    &DOLCLRD
tcblock mbipmacl 0x03C7    0x01AE 0x003C 0x003C 0x03D2 
#    SETREG   $IPRL_STR_DPCW    0x0040                 ; Set 30s D
tcblock mbipmacl 0x03CB    0x0140 0x05BC 0x0040 
#    REGOR    $IPRL_STR_DPCW+1  $IPRL_STR_DPCW  $IPRL_STR_LCLRDP_W
tcblock mbipmacl 0x03CE    0x2150 0x05BD 0x05BC 0x04B6 
#DOLCLRD:
#    LRDXFR   $IPRL_STR_LCLRDP_W
tcblock mbipmacl 0x03D2    0x0198 0x04AC 
#;
#;
#; Limb Figure
#;
#    LRDXFR   R402
tcblock mbipmacl 0x03D4    0x0198 0x0192 
#;
#; GOLF Proxy
#    LRDXFR   R374
tcblock mbipmacl 0x03D6    0x0198 0x0176 
#;
#; Continuum Intensity
#;
#    LRDXFR   R388
tcblock mbipmacl 0x03D8    0x0198 0x0184 
#;
#; Output Magnetogram if VC <> 0 && CmpgF == 0 && NSeg <> 0
#MAG_DL:
#    BRANCHIF  R3075                &ENDMAG            ; No 160k
tcblock mbipmacl 0x03DA    0x015A 0x0C03 0x03F7 
#    BRANCHEQ  R3076       1        &ENDMAG            ; Campaign 
tcblock mbipmacl 0x03DD    0x01AE 0x0C04 0x0001 0x03F7 
#    BRANCHIF  $IPRL_MAG_LRDPRM+3   &MED_L
tcblock mbipmacl 0x03E1    0x015A 0x0565 0x0406 
#;
#    COPYREG   $IPRL_STR_LRDXFR_N   $IPRL_STR_LRDXFR_C ; Initializ
tcblock mbipmacl 0x03E4    0x0142 0x06AC 0x06AD 
#CHK_NPIX:
#    REGSUB    $IPRL_MAG_LRDPRM+13  $IPRL_MAG_LRDPRM+1  $IPRL_MAG_
tcblock mbipmacl 0x03E7    0x2146 0x056F 0x0563 0x057B 
#    BRANCHGT  $IPRL_MAG_TMP     0  &DO_MAG5K
tcblock mbipmacl 0x03EB    0x01BA 0x057B 0x0000 0x03FC 
#    REGSUB    $IPRL_MAG_LRDPRM+12  $IPRL_MAG_LRDPRM    $IPRL_MAG_
tcblock mbipmacl 0x03EF    0x2146 0x056E 0x0562 0x057B 
#    BRANCHGT  $IPRL_MAG_TMP     0  &DO_MAG5K
tcblock mbipmacl 0x03F3    0x01BA 0x057B 0x0000 0x03FC 
#ENDMAG:
#    SETREG    $IPRL_MAG_LRDPRM+3   0                  ; No more M
tcblock mbipmacl 0x03F7    0x0140 0x0565 0x0000 
#    GOTO      &MED_L
tcblock mbipmacl 0x03FA    0x0156 0x0406 
#;
#DO_MAG5K:
#    LRDXFR    $IPRL_MAG_LRDPRM
tcblock mbipmacl 0x03FC    0x0198 0x0562 
#    ADDREGD   $IPRL_STR_LRDXFR_C   0xFFFF
tcblock mbipmacl 0x03FE    0x01BC 0x06AD 0xFFFF 
#    BRANCHIF  $IPRL_STR_LRDXFR_C   &SCITM_DONE
tcblock mbipmacl 0x0401    0x015A 0x06AD 0x0422 
#    GOTO      &CHK_NPIX
tcblock mbipmacl 0x0404    0x0156 0x03E7 
#;
#;   LRDXFR    $IPRL_MAG_LRDPRM
#;   LRDXFR    $IPRL_MAG_LRDPRM
#;   LRDXFR    $IPRL_MAG_LRDPRM
#;   GOTO      &SCITM_DONE
#;
#MED_L:
#;
#; Medium-l Data output
#;
#;   LRDXFR   R360
#;      NpixTotal          0
#;      NpixSeg            0
#;      Seqment            4
#;      Source             7:0x110000
#;      MaxSource          3584
#;      N                  0
#;      K                  0
#;      SegLength          3584
#;      DPID               0xBFFFFFB0L
#;      NPixImage          14336L
#;
#;   SETREGS  R360  9  0 0 0 4 7:0x110000 3584 0 0 
#;   SETREGS  R369  5 3584 0xBFFF 0xFFB0 14336 0
#    COPYRD2D $IPRL_STR_MEDL_L    $IPRL_STR_MEDL_W  14   ; Copy Me
tcblock mbipmacl 0x0406    0x0144 0x0168 0x01DC 0x000E 
#;
#    SETREG   $IPRL_STR_DPCW      0xFF3F
tcblock mbipmacl 0x040A    0x0140 0x05BC 0xFF3F 
#    REGAND   $IPRL_STR_MEDL_W+10 $IPRL_STR_DPCW    $IPRL_STR_DPCW
tcblock mbipmacl 0x040D    0x0150 0x01E6 0x05BC 0x05BD 
#    BRANCHEQ $IPRL_STR_ACCTIM    60                &DOLRDM
tcblock mbipmacl 0x0411    0x01AE 0x003C 0x003C 0x041C 
#    SETREG   $IPRL_STR_DPCW      0x0040                 ; Set 30s
tcblock mbipmacl 0x0415    0x0140 0x05BC 0x0040 
#    REGOR    $IPRL_STR_DPCW+1    $IPRL_STR_DPCW    $IPRL_STR_MEDL
tcblock mbipmacl 0x0418    0x2150 0x05BD 0x05BC 0x01E6 
#DOLRDM:    
#    LRDXFR   $IPRL_STR_MEDL_W
tcblock mbipmacl 0x041C    0x0198 0x01DC 
#    BRANCHNE $IPRL_STR_MEDL_W+3  0   &DOLRDM
tcblock mbipmacl 0x041E    0x01B0 0x01DF 0x0000 0x041C 
#;
#;
#SCITM_DONE:
#    LRDEND
tcblock mbipmacl 0x0422    0x0196 
#    SETIRPT  1
tcblock mbipmacl 0x0423    0x014E 0x0001 
#;
#;................................................................
#;
#; Construct Time Weighted Averages
#;
#    TWAVG    R908               ; MP #1
tcblock mbipmacl 0x0425    0x01CE 0x038C 
#    TWAVG    R928               ; MP #2
tcblock mbipmacl 0x0427    0x01CE 0x03A0 
#;
#    TWAVG    R960               ; FB #1
tcblock mbipmacl 0x0429    0x01CE 0x03C0 
#    TWAVG    R980               ; FB #2
tcblock mbipmacl 0x042B    0x01CE 0x03D4 
#;
#    TWAVG    R864               ; LF #1
tcblock mbipmacl 0x042D    0x01CE 0x0360 
#    TWAVG    R888               ; LF #2
tcblock mbipmacl 0x042F    0x01CE 0x0378 
#;
#;................................................................
#;
#    BRANCHEQ R873  0  &PATH1
tcblock mbipmacl 0x0431    0x01AE 0x0369 0x0000 0x043B 
#    BRANCHEQ R897  0  &PATH2
tcblock mbipmacl 0x0435    0x01AE 0x0381 0x0000 0x0447 
#    GOTO     &DONE5K
tcblock mbipmacl 0x0439    0x0156 0x045B 
#;
#PATH1:
#;   _COPYLST R216                  ; MP RWBin 1 <- New MP RWBin L
#;   _COPYLST R280                  ; FB RWBin 1 <- New FB RWBin L
#    _COPYLST R344                  ; LFCropList1 <- New LF Crop L
tcblock mbipmacl 0x043B    0x81C2 0x0158 
#    COPYRD2D $IPRL_STR_LFLRD1  R402  14        ; Set LRDXFR from 
tcblock mbipmacl 0x043D    0x0144 0x06AE 0x0192 0x000E 
#    COPYRD2D R296  $IPRL_STR_LFLRD1  14        ; Copy LRD params 
tcblock mbipmacl 0x0441    0x0144 0x0128 0x06AE 0x000E 
#    GOTO     &CPYLRD
tcblock mbipmacl 0x0445    0x0156 0x0453 
#;
#PATH2:
#;   _COPYLST R288                  ; FB RWBin 2 <- New FB RWBin L
#    _COPYLST R352                  ; LFCropList2 <- New LF Crop L
tcblock mbipmacl 0x0447    0x81C2 0x0160 
#    COPYRD2D $IPRL_STR_LFLRD2  R402  14        ; Set LRDXFR from 
tcblock mbipmacl 0x0449    0x0144 0x06BE 0x0192 0x000E 
#    COPYRD2D R296  $IPRL_STR_LFLRD2  14        ; Set LRDXFR from 
tcblock mbipmacl 0x044D    0x0144 0x0128 0x06BE 0x000E 
#    GOTO     &CPYLRD
tcblock mbipmacl 0x0451    0x0156 0x0453 
#;
#CPYLRD:
#    COPYRD2D R168  R374  14
tcblock mbipmacl 0x0453    0x0144 0x00A8 0x0176 0x000E 
#    COPYRD2D R232  R388  14
tcblock mbipmacl 0x0457    0x0144 0x00E8 0x0184 0x000E 
#;   COPYRD2D R296  R402  14        ; Set LRDXFR from set 1
#;
#DONE5K:
#    RTNQUE
tcblock mbipmacl 0x045B    0x01FA 
#;
#;................................................................
#; Subroutine to make a velocity data product
#;
#MKVELDP:
#; Scale Velocity data; Source Page 5, Dest Page 4
#    SETREGS  R504  8  5:0x00000 11:0x00000  0x100000L  1  13
tcblock mbipmacl 0x045C    0x01B2 0x01F8 0x0008 0x0000 \
                                0x2800 0x0000 0x5800 0x0000 \
                                0x0010 0x0001 0x000D 
#    SCALE    R504
tcblock mbipmacl 0x0467    0x01BE 0x01F8 
#;
#;   Copy Velocity from page 4 to destination page (5 or 8)
#    SETREGS  R520  8  0x5800   5:0x00726  0  1010  14:0x00000  R6
tcblock mbipmacl 0x0469    0x01B2 0x0208 0x0008 0x5800 \
                                0x0726 0x2800 0x0000 0x03F2 \
                                0x0000 0x7000 0x0045 
#    COPYREG  $IPRL_STR_VELDEST    R521
tcblock mbipmacl 0x0474    0x0142 0x0640 0x0209 
#    ADDREGD  R521  0x0226
tcblock mbipmacl 0x0477    0x01BC 0x0209 0x0226 
#    COPYREG  $IPRL_STR_VELDEST+1  R522
tcblock mbipmacl 0x047A    0x0142 0x0641 0x020A 
#    CROP     R520
tcblock mbipmacl 0x047D    0x0178 0x0208 
#;
#    SETREGS  R512  6 19:0x110000  5:0x00500  550L
tcblock mbipmacl 0x047F    0x01B2 0x0200 0x0006 0x0000 \
                                0x9811 0x0500 0x2800 0x0226 \
                                0x0000 
#    COPYREG  $IPRL_STR_VELDEST    R514
tcblock mbipmacl 0x0488    0x0142 0x0640 0x0202 
#    COPYREG  $IPRL_STR_VELDEST+1  R515
tcblock mbipmacl 0x048B    0x0142 0x0641 0x0203 
#    MOVBLKI  R512  
tcblock mbipmacl 0x048E    0x0166 0x0200 
#    RTNQUE
tcblock mbipmacl 0x0490    0x01FA 
#;
#;................................................................
#; Subroutine to make Continuum / Line-Depth data product
#;
#MKICDP:
#MKLDDP:
#; Jump to either GENICDP or GENLDDP
#    BRANCHIF $IPRL_STR_ICLDOPT  &GENICDP
tcblock mbipmacl 0x0491    0x015A 0x0693 0x0496 
#    GOTO     &GENLDDP
tcblock mbipmacl 0x0494    0x0156 0x04A6 
#;
#GENICDP:
#    SETREGS  R544 8 7:0x00000  11:0x00000  0x100000L  0x0000  9
tcblock mbipmacl 0x0496    0x01B2 0x0220 0x0008 0x0000 \
                                0x3800 0x0000 0x5800 0x0000 \
                                0x0010 0x0000 0x0009 
#    SETREG   $IPRL_STR_HDOFST    0x0226
tcblock mbipmacl 0x04A1    0x0140 0x0694 0x0226 
#    GOTO     &MKDP
tcblock mbipmacl 0x04A4    0x0156 0x04B6 
#;
#GENLDDP:
#    SETREGS  R544 8 6:0x00000  11:0x00000  0x100000L  0x0000  6
tcblock mbipmacl 0x04A6    0x01B2 0x0220 0x0008 0x0000 \
                                0x3000 0x0000 0x5800 0x0000 \
                                0x0010 0x0000 0x0006 
#    SETREG   $IPRL_STR_HDOFST    0x0500
tcblock mbipmacl 0x04B1    0x0140 0x0694 0x0500 
#    GOTO     &MKDP
tcblock mbipmacl 0x04B4    0x0156 0x04B6 
#;
#MKDP:
#;   Apply Square-Root (Table @ Seg 9) scaling to the Uncropped im
#    LOOKUP   R544
tcblock mbipmacl 0x04B6    0x01C0 0x0220 
#;
#;   Crop Continuum from page 11 to Destination Page (7 or 9)
#    SETREGS  R536  8  0x5800 7:0x00226  0  1010  14:0x00000  R69
tcblock mbipmacl 0x04B8    0x01B2 0x0218 0x0008 0x5800 \
                                0x0226 0x3800 0x0000 0x03F2 \
                                0x0000 0x7000 0x0045 
#    COPYREG  $IPRL_STR_ICDEST    R537
tcblock mbipmacl 0x04C3    0x0142 0x0642 0x0219 
#    ADDREGD  R537  0x0226
tcblock mbipmacl 0x04C6    0x01BC 0x0219 0x0226 
#    COPYREG  $IPRL_STR_ICDEST+1  R538
tcblock mbipmacl 0x04C9    0x0142 0x0643 0x021A 
#    CROP     R536
tcblock mbipmacl 0x04CC    0x0178 0x0218 
#;
#; Copy Header to destination page (7 or 9)
#    SETREGS  R512  6  19:0x110226  7:0x00500  550L
tcblock mbipmacl 0x04CE    0x01B2 0x0200 0x0006 0x0226 \
                                0x9811 0x0500 0x3800 0x0226 \
                                0x0000 
#    COPYREG  $IPRL_STR_HDOFST    R512
tcblock mbipmacl 0x04D7    0x0142 0x0694 0x0200 
#    COPYREG  $IPRL_STR_ICDEST    R514
tcblock mbipmacl 0x04DA    0x0142 0x0642 0x0202 
#    COPYREG  $IPRL_STR_ICDEST+1  R515
tcblock mbipmacl 0x04DD    0x0142 0x0643 0x0203 
#    MOVBLKI  R512  
tcblock mbipmacl 0x04E0    0x0166 0x0200 
#;
#;   Load length in R534
#    COPYREG  R71  R534
tcblock mbipmacl 0x04E2    0x0142 0x0047 0x0216 
#    COPYREG  R72  R535
tcblock mbipmacl 0x04E5    0x0142 0x0048 0x0217 
#;
#    RTNQUE
tcblock mbipmacl 0x04E8    0x01FA 
#;
#;--------------------------------------------------------------
#; Routine to call VWBIN instruction repeatedly.
#;
#; RWBIN register list must be in R900
#; $IPRL_STR_NVWBIN - Number of times to call VWBIN
#; $IPRL_STR_VWCNT  - Loop Counter
#;
#DO_VWBIN:
#    COPYREG    $IPRL_STR_NVWBIN  $IPRL_STR_VWCNT
tcblock mbipmacl 0x04E9    0x0142 0x06AA 0x06AB 
#VWLOOP:
#    BRANCHIF   $IPRL_STR_VWCNT   &VWLDONE
tcblock mbipmacl 0x04EC    0x015A 0x06AB 0x04F6 
#    VWBIN      R900
tcblock mbipmacl 0x04EF    0x019E 0x0384 
#    ADDREGD    $IPRL_STR_VWCNT   0xFFFF
tcblock mbipmacl 0x04F1    0x01BC 0x06AB 0xFFFF 
#    GOTO       &VWLOOP
tcblock mbipmacl 0x04F4    0x0156 0x04EC 
#;
#VWLDONE:
#    RTNQUE
tcblock mbipmacl 0x04F6    0x01FA 
#;
#;--------------------------------------------------------------
#; Routine to call RWBIN instruction repeatedly.
#;
#; RWBIN register list must be in R900
#; $IPRL_STR_NRWBIN - Number of times to call RWBIN
#; $IPRL_STR_RWCNT  - Loop Counter
#;
#DO_RWBIN:
#    COPYREG    $IPRL_STR_NRWBIN  $IPRL_STR_RWCNT
tcblock mbipmacl 0x04F7    0x0142 0x06A8 0x06A9 
#RWLOOP:
#    BRANCHIF   $IPRL_STR_RWCNT   &RWLDONE
tcblock mbipmacl 0x04FA    0x015A 0x06A9 0x0504 
#    RWBIN      R900
tcblock mbipmacl 0x04FD    0x01A0 0x0384 
#    ADDREGD    $IPRL_STR_RWCNT   0xFFFF
tcblock mbipmacl 0x04FF    0x01BC 0x06A9 0xFFFF 
#    GOTO       &RWLOOP
tcblock mbipmacl 0x0502    0x0156 0x04FA 
#;
#RWLDONE:
#    RTNQUE
tcblock mbipmacl 0x0504    0x01FA 
#;
#;--------------------------------------------------------------
#; Function to create data product containing IP registers.
#;
#; Register Usage:
#;   Register(s)             Usage
#;     R1130        R_init:       Initialization Flag
#;     R1131        R_r0_addr_lo: Low order Address of R0
#;     R1132-1133   R_startaddr:  Address of 1st register of D/L B
#;     R1134        R_startnum:   Start register Number 
#;     R1135-1136   R_endaddr:    Address of last regsier of D/L B
#;     R1137        R_endnum:     End register number
#;     R1138        R_diff:       = (R_movreg - R_endaddr)
#;     R1139        R_movreg:     RL for moving a block of registe
#;     R1145        R_lrdxfr:     RL to create dp entry.
#;
#;   Address
#;    7:0x113C00    dp_buf0:      CCD Temperatures
#;    7:0x113C14    dp_buf1:      Fixed Registers (R126-R159)
#;    7:0x113C36    dp_buf2:      Register Block 
#;
#;     40           Count
#;     94           max_src
#;
#;................................................................
#;
#REGDP:
#    BRANCHIF  R1130        &MKDPC
tcblock mbipmacl 0x0505    0x015A 0x046A 0x0510 
#;
#    CALLQUE   &INITREG
tcblock mbipmacl 0x0508    0x01F8 0x053A 
#;   
#    SETREG    R1131        0xE000
tcblock mbipmacl 0x050A    0x0140 0x046B 0xE000 
#;
#    SETREG    R1130        0
tcblock mbipmacl 0x050D    0x0140 0x046A 0x0000 
#;
#MKDPC:
#;
#; Copy CCD temperatures to output buffer
#    SAVERLST  R0            20          7:0x113C00
tcblock mbipmacl 0x0510    0x014A 0x0000 0x0014 0x3C00 \
                                0x3811 
#;
#; Copy current pointer in the register block to R126
#    REGSUB    R1140         R1131       R126
tcblock mbipmacl 0x0515    0x2146 0x0474 0x046B 0x007E 
#;
#; Save Register pointer and Memory Purge registers to o/p buffer
#    SAVERLST  R126          34          7:0x113C14
tcblock mbipmacl 0x0519    0x014A 0x007E 0x0022 0x3C14 \
                                0x3811 
#;
#; Set destination address in MOVBLKI register list
#    SETREGS   R1142      2              7:0x113C36
tcblock mbipmacl 0x051E    0x01B2 0x0476 0x0002 0x3C36 \
                                0x3811 
#    SETREGS   R1144      2              40L   
tcblock mbipmacl 0x0523    0x01B2 0x0478 0x0002 0x0028 \
                                0x0000 
#
#; Copy register sub-block and setup dpc header
#    MOVBLKI   R1140
tcblock mbipmacl 0x0528    0x0166 0x0474 
#;   SETREGS   R1146      6  0  0  0  1  7:0x113C00 
#;   SETREGS   R1152      6  94 0  0  94 0xA000  0xffb6
#;   SETREGS   R1158      2  94 0
#    COPYREG   R126       $IPRL_STR_RDUMP+11
tcblock mbipmacl 0x052A    0x0142 0x007E 0x0485 
#;   _LRDXFR   R1146
#    _LRDXFR   $IPRL_STR_RDUMP
tcblock mbipmacl 0x052D    0x8198 0x047A 
#;
#; Check if Register block downlink is completed
#    REGSUB    R1140      R1136   R1160
tcblock mbipmacl 0x052F    0x2146 0x0474 0x0470 0x0488 
#    BRANCHLT  R1160        0           &DONER
tcblock mbipmacl 0x0533    0x01B8 0x0488 0x0000 0x0539 
#    CALLQUE   &INITREG
tcblock mbipmacl 0x0537    0x01F8 0x053A 
#DONER:
#    RTNQUE
tcblock mbipmacl 0x0539    0x01FA 
#;
#;.......................................................
#; Initialize Registers
#;
#; Registers area is 16:0x0BE000 to 16:0x0BFFFF
#;
#; R1134, R1135 - Contains the Register Block Start Number
#; R1138, R1139 - Contains Register Block End Number 
#; R1132, R1133 - Address of Start Register Number
#; R1135, R1136 - Address of end Register Number
#; R1140, R1141 - Address of next register to be downlinked
#;
#INITREG:
#    SETREGS   R1132   2             16:0x0BE000
tcblock mbipmacl 0x053A    0x01B2 0x046C 0x0002 0xE000 \
                                0x800B 
#    ADDADR    R1132   R1134  R1132
tcblock mbipmacl 0x053F    0x0148 0x046C 0x046E 0x046C 
#    SETREGS   R1136     2           16:0x0BE000
tcblock mbipmacl 0x0543    0x01B2 0x0470 0x0002 0xE000 \
                                0x800B 
#    ADDADR    R1136   R1138  R1136
tcblock mbipmacl 0x0548    0x0148 0x0470 0x0472 0x0470 
#    COPYREG   R1132   R1140
tcblock mbipmacl 0x054C    0x0142 0x046C 0x0474 
#    COPYREG   R1133   R1141
tcblock mbipmacl 0x054F    0x0142 0x046D 0x0475 
#    RTNQUE
tcblock mbipmacl 0x0552    0x01FA 
#;.......................................................
#;--------------------------------------------------------------
#;           dmphr.ips
#;
#; This file contains modules to downlink Med-l, MP, FB
#; and LF data.
#;
#;   R0081  -  High Rate Board Status; 0 = OK; 1 = NOK
#;
#;-----------------------------------------------------
#;...................................................
#;
#DMPHR:
#    CALLQUE   &QSR_TLM_RESET
tcblock mbipmacl 0x0553    0x01F8 0x0B80 
#    BRANCHNE  $IPRL_TLM_STATUS   0   &DMPHR_EXIT
tcblock mbipmacl 0x0555    0x01B0 0x1FFC 0x0000 0x057C 
#;
#VELIMG:
#    SETREGS   $IPRL_STR_VELDEST  2 8:0x00000
tcblock mbipmacl 0x0559    0x01B2 0x0640 0x0002 0x0000 \
                                0x4000 
#    CALLQUE   &MKVELDP
tcblock mbipmacl 0x055E    0x01F8 0x045C 
#    COPYREG   R71   R518
tcblock mbipmacl 0x0560    0x0142 0x0047 0x0206 
#    COPYREG   R72   R519
tcblock mbipmacl 0x0563    0x0142 0x0048 0x0207 
#;
#IcIMG:
#    SETREGS   $IPRL_STR_ICDEST    2 9:0x00000
tcblock mbipmacl 0x0566    0x01B2 0x0642 0x0002 0x0000 \
                                0x4800 
#    CALLQUE   &MKICDP
tcblock mbipmacl 0x056B    0x01F8 0x0491 
#    COPYREG   R71   R534
tcblock mbipmacl 0x056D    0x0142 0x0047 0x0216 
#    COPYREG   R72   R535
tcblock mbipmacl 0x0570    0x0142 0x0048 0x0217 
#;
#    NOOP
tcblock mbipmacl 0x0573    0x01DE 
#;
#;   Start Hi-Rate
#    START2HR  0x49  0x4000  0x4800  R518  R534
tcblock mbipmacl 0x0574    0x019A 0x0049 0x4000 0x4800 \
                                0x0206 0x0216 
#    CALLQUE   &QSR_STR_CHKDL8
tcblock mbipmacl 0x057A    0x01F8 0x0B20 
#;
#DMPHR_EXIT:
#    RTNQUE
tcblock mbipmacl 0x057C    0x01FA 
#;
#;-----------------------------------------------------
#;============================================================
#=======================================================
#
return
#
#=======================================================
