# File: fl_ipon.src
#
# This procedure powers up the Image Processor.
#
# This procedure is translated from m_fl_ipon TSTOL procedure.
# 
# Modified to remove the EDAC page initilization and base
# queue and table loads 

program "@(#) MODULE: fl_ipon.src RELEASE: %R%.%L% CREATED: %G% %U%"
source "/mdisw/cfl/sim/src/fl_ipon.src"
descr "   fl_ipon - Power on image processor"

display "Executing procedure fl_ipon."

## Turn on IP power
tcblock mbpwipon
wait time 10

## Reset all
tcblock mbiprsal                
wait time 5

## Set IP state to "run"
tcblock mbiprun                 
wait time 10

if getdig(mkpwip) <> "          ON" then
  display "Image processor is NOT on"
end if

## load IP built-in code

## Load Flight WCS code
tcblock mbiplbic 0x36 0x06
wait time 70

## Run Initialization code
tcblock mbipcmd 5
wait time 5

## Initialize EDAC memory
#tcblock mbipldin 0x0116 0x8000 0x0080     ## Initialize 2-byte EDAC page (16)
#tcblock mbipldin 0x0118 0x5000 0x0090     ## Initialize 8-byte EDAC page (10)
#tcblock mbipldin 0x0118 0x6000 0x0098     ## Initialize 8-byte EDAC page (12)
#tcblock mbipldin 0x0118 0x7000 0x0088     ## Initialize 8-byte EDAC page (14)
wait time 30

## Reset IP
tcblock mbiprsal

## Bring IP upto latest rev
perf ip_patches_v01
#perf fl_ipfp1901

#perf fl_ipqload
#perf fl_iptload

## Set IP to d/l from page 8 (prime)
tcblock mbipldin 0x0140 0x0021 0x0000

## Reload the camera header
tcblock mbcmhdr1 0x4040 0x4040 0x0000 0x0001 0x0000

## Disable queue
tcblock mbipldin 0x154

## Set default program to heritage
tcblock mbipcmd 0x91 0 0x1f00

## Enable queue
tcblock mbipldin 0x136

## Enable DEP interrupts
tcblock mbipldin 0x134

tcblock mbiplbic 5 5
wait time 5.0

## Reload the camera header
tcblock mbcmhdr1 0x4040 0x4040 0x0000 0x0001 0x0000

## Set downlink to non-compressed 
tcblock mbipldin 0x140 0x3d 0
tcblock mbipldin 0x140 0x21 0

tcblock mbipldin 0x11c

# perf fl_iprload

display "Finished procedure fl_ipon : %s" !TIME
