# File: dyndp2_v01.src
#
program "%Z% MODULE: %M% RELEASE: %R%.%L% CREATED: %G% %U%"
source "/mdisw/cfl/prep/src/dyndp2_v01.src"
descr "Loads IP queue instructions"
#=======================================================
#
#
#;+
#; DYNDP2 - 
#;     Selects 2nd dynamics data product. 
#;
#; Call Sequence:
#;     The data product flag should be set to a non-zero value.
#;     The register bank $IPRL_STR_PAGDL should be inbitialized as
#;         $IPRL_STR_PAGDL       Header Address Low
#;         $IPRL_STR_PAGDL+1     Header Address High
#;         $IPRL_STR_PAGDL+2     Source Address Low
#;         $IPRL_STR_PAGDL+3     Source Address High
#;         $IPRL_STR_PAGDL+4     Size Low
#;         $IPRL_STR_PAGDL+5     Size High
#;         $IPRL_STR_PAGDL+6     Compression Parameters n (7:4) an
#;         $IPRL_STR_PAGDL+7     DPC  High
#;         $IPRL_STR_PAGDL+8     DPC  Low
#;         
#;-
#;
#DYNDP2::
#;
#MAGDL:
#    BRANCHIF $IPRL_STR_DP2MAG   &CBVDL
tcblock mbipmacl 0x0C00    0x015A 0x0709 0x0C26 
#    BRANCHEQ $IPRL_STR_DP2MAG   1    &MAGDL2 
tcblock mbipmacl 0x0C03    0x01AE 0x0709 0x0001 0x0C15 
#    ADDREGD  $IPRL_STR_DP2MAG   0xFFFF
tcblock mbipmacl 0x0C07    0x01BC 0x0709 0xFFFF 
#    COPYRD2D $IPRL_STR_MAGDLP1  $IPRL_STR_PAGDL   9
tcblock mbipmacl 0x0C0A    0x0144 0x071C 0x0712 0x0009 
#    CALLQUE  &PAGDL
tcblock mbipmacl 0x0C0E    0x01F8 0x0C62 
#    START1HR 0x31  0x5800  R534
tcblock mbipmacl 0x0C10    0x0174 0x0031 0x5800 0x0216 
#    RTNQUE
tcblock mbipmacl 0x0C14    0x01FA 
#;
#MAGDL2:
#    BRANCHIF $IPRL_STR_DP2MAG   &CBVDL 
tcblock mbipmacl 0x0C15    0x015A 0x0709 0x0C26 
#    COPYRD2D $IPRL_STR_MAGDLP2  $IPRL_STR_PAGDL   9
tcblock mbipmacl 0x0C18    0x0144 0x0726 0x0712 0x0009 
#    SETREG   $IPRL_STR_DP2MAG   0
tcblock mbipmacl 0x0C1C    0x0140 0x0709 0x0000 
#    CALLQUE  &PAGDL
tcblock mbipmacl 0x0C1F    0x01F8 0x0C62 
#    START1HR 0x31  0x5800  R534
tcblock mbipmacl 0x0C21    0x0174 0x0031 0x5800 0x0216 
#    RTNQUE
tcblock mbipmacl 0x0C25    0x01FA 
#;
#CBVDL:
#    BRANCHIF $IPRL_STR_DP2CBV   &CBIDL 
tcblock mbipmacl 0x0C26    0x015A 0x070A 0x0C3A 
#    SETREG   $IPRL_STR_SELDP2   &CBIDL
tcblock mbipmacl 0x0C29    0x0140 0x0708 0x0C3A 
#    COPYRD2D $IPRL_STR_CBVDLP   $IPRL_STR_PAGDL   9
tcblock mbipmacl 0x0C2C    0x0144 0x0730 0x0712 0x0009 
#    SETREG   $IPRL_STR_DP2CBV   0
tcblock mbipmacl 0x0C30    0x0140 0x070A 0x0000 
#    CALLQUE  &PAGDL
tcblock mbipmacl 0x0C33    0x01F8 0x0C62 
#    START1HR 0x33  0x5800  R534
tcblock mbipmacl 0x0C35    0x0174 0x0033 0x5800 0x0216 
#    RTNQUE
tcblock mbipmacl 0x0C39    0x01FA 
#;
#CBIDL:
#    BRANCHIF $IPRL_STR_DP2CBI   &MEMDL 
tcblock mbipmacl 0x0C3A    0x015A 0x070B 0x0C4E 
#    SETREG   $IPRL_STR_SELDP2   &MEMDL
tcblock mbipmacl 0x0C3D    0x0140 0x0708 0x0C4E 
#    COPYRD2D $IPRL_STR_CBIDLP   $IPRL_STR_PAGDL   9
tcblock mbipmacl 0x0C40    0x0144 0x073A 0x0712 0x0009 
#    SETREG   $IPRL_STR_DP2CBI   0
tcblock mbipmacl 0x0C44    0x0140 0x070B 0x0000 
#    CALLQUE  &PAGDL
tcblock mbipmacl 0x0C47    0x01F8 0x0C62 
#    START1HR 0x33  0x5800  R534
tcblock mbipmacl 0x0C49    0x0174 0x0033 0x5800 0x0216 
#    RTNQUE
tcblock mbipmacl 0x0C4D    0x01FA 
#;
#MEMDL:
#    BRANCHIF $IPRL_STR_DP2PAG   &DP2DONE
tcblock mbipmacl 0x0C4E    0x015A 0x070C 0x0C8E 
#    COPYRD2D $IPRL_STR_MEMDLP   $IPRL_STR_PAGDL   9
tcblock mbipmacl 0x0C51    0x0144 0x0744 0x0712 0x0009 
#    COPYREG  $IPRL_STR_PAGDL+3  $IPRL_STR_PAGDL+8        ; DPC lo
tcblock mbipmacl 0x0C55    0x0142 0x0715 0x071A 
#    SETREG   $IPRL_STR_DP2PAG   0
tcblock mbipmacl 0x0C58    0x0140 0x070C 0x0000 
#    CALLQUE  &PAGDL
tcblock mbipmacl 0x0C5B    0x01F8 0x0C62 
#    START1HR 0x33  0x5800  R534
tcblock mbipmacl 0x0C5D    0x0174 0x0033 0x5800 0x0216 
#    RTNQUE
tcblock mbipmacl 0x0C61    0x01FA 
#;
#PAGDL:
#    COPYREG  $IPRL_STR_PAGDL      $IPRL_STR_DYNWRK     ; Copy Hea
tcblock mbipmacl 0x0C62    0x0142 0x0712 0x074E 
#    COPYREG  $IPRL_STR_PAGDL+1    $IPRL_STR_DYNWRK+1
tcblock mbipmacl 0x0C65    0x0142 0x0713 0x074F 
#    SETREG   $IPRL_STR_DYNWRK+2   0x5800
tcblock mbipmacl 0x0C68    0x0140 0x0750 0x5800 
#    COPYRD2D $IPRL_STR_PAGDL+6    $IPRL_STR_DYNWRK+3   3
tcblock mbipmacl 0x0C6B    0x0144 0x0718 0x0751 0x0003 
#    HRDINIT  $IPRL_STR_DYNWRK
tcblock mbipmacl 0x0C6F    0x019C 0x074E 
#;
#    COPYREG  $IPRL_STR_PAGDL+2    $IPRL_STR_DYNWRK      ; Copy da
tcblock mbipmacl 0x0C71    0x0142 0x0714 0x074E 
#    COPYREG  $IPRL_STR_PAGDL+3    $IPRL_STR_DYNWRK+1
tcblock mbipmacl 0x0C74    0x0142 0x0715 0x074F 
#    SETREGS  $IPRL_STR_DYNWRK+2   2   11:0x00226
tcblock mbipmacl 0x0C77    0x01B2 0x0750 0x0002 0x0226 \
                                0x5800 
#    COPYREG  $IPRL_STR_PAGDL+4    $IPRL_STR_DYNWRK+4
tcblock mbipmacl 0x0C7C    0x0142 0x0716 0x0752 
#    COPYREG  $IPRL_STR_PAGDL+5    $IPRL_STR_DYNWRK+5
tcblock mbipmacl 0x0C7F    0x0142 0x0717 0x0753 
#    MOVBLKI  $IPRL_STR_DYNWRK
tcblock mbipmacl 0x0C82    0x0166 0x074E 
#;
#    COPYREG  $IPRL_STR_PAGDL+4    R534      ; Set up size registe
tcblock mbipmacl 0x0C84    0x0142 0x0716 0x0216 
#    COPYREG  $IPRL_STR_PAGDL+5    R535
tcblock mbipmacl 0x0C87    0x0142 0x0717 0x0217 
#    SETREG   $IPRL_STR_F11DL    1
tcblock mbipmacl 0x0C8A    0x0140 0x0710 0x0001 
#    RTNQUE
tcblock mbipmacl 0x0C8D    0x01FA 
#;
#DP2DONE:
#    RTNQUE
tcblock mbipmacl 0x0C8E    0x01FA 
#;................................................................
#
#=======================================================
#
return
#
#=======================================================
