# File: frmchk_v03.src
#
program "%Z% MODULE: %M% RELEASE: %R%.%L% CREATED: %G% %U%"
source "frmchk_v03.ips"
descr "Loads IP queue instructions"
#
# DSBQUE                ; Disable Queue
tcblock mbipldin 0x0154 
#
#=======================================================
#
#
#;==================================================
#;
#; FRAMECHK
#;
#; Check if actual frame number = expected frame number
#;
#; Register Usage:                                            | In
#;   R3072           - Actual Frame number                    |   
#;   IPRL_STR_EXPFRM - Expected frame number                  |   
#;   IPRL_STR_FRMDIF = (Actual) XOR (Expected)                |   
#;   IPRL_STR_FRMERR - Number of frame errors in obs interval |   
#;   IPRL_STR_FRERRH - Pointer to error exit                  |  &
#;
#;................................................................
#;
#QSR_STR_FRMCHK::
#    REGXOR    R3072   $IPRL_STR_EXPFRM   $IPRL_STR_FRMDIF
tcblock mbipcmd 0x0091 0x0D00   0x4150 0x0C00 0x0678 0x0679 
#;
#;>>>>> Set up parameters for next frame before checking for error
#;
#    COPYRD2I  R0105     R115     10                ; Save CCD hdr
tcblock mbipcmd 0x0091 0x0D04   0x01AA 0x0069 0x0073 0x000A 
#    ADDREGD   R0115              10
tcblock mbipcmd 0x0091 0x0D08   0x01BC 0x0073 0x000A 
#    ADDREGD   $IPRL_STR_EXPFRM   1                 ; Incr expecte
tcblock mbipcmd 0x0091 0x0D0B   0x01BC 0x0678 0x0001 
#    ADDREGD   $IPRL_STR_FRERRH   3                 ; Point to nex
tcblock mbipcmd 0x0091 0x0D0E   0x01BC 0x067B 0x0003 
#;
#    BRANCHEQ  $IPRL_STR_ACCTIM  30   &P30FRM       ; Prime60 or P
tcblock mbipcmd 0x0091 0x0D11   0x01AE 0x003C 0x001E 0x0D1B 
#;
#P60FRM:
#    BRANCHLT  $IPRL_STR_EXPFRM  21   &CHKFRMERR    ; P60; Max Frm
tcblock mbipcmd 0x0091 0x0D15   0x01B8 0x0678 0x0015 0x0D30 
#    GOTO      &SET_FRMCHK
tcblock mbipcmd 0x0091 0x0D19   0x0156 0x0D1F 
#;
#P30FRM:
#    BRANCHLT  $IPRL_STR_EXPFRM  11   &CHKFRMERR    ; P30; Max Frm
tcblock mbipcmd 0x0091 0x0D1B   0x01B8 0x0678 0x000B 0x0D30 
#;
#SET_FRMCHK:
#    SAVERLST  R3895     200      6:0x11FF38
tcblock mbipcmd 0x0091 0x0D1F   0x014A 0x0F37 0x00C8 0xFF38 \
                                0x3011 
#    SETREG    $IPRL_STR_EXPFRM   1                 ; Reset Exp fr
tcblock mbipcmd 0x0091 0x0D24   0x0140 0x0678 0x0001 
#    SETREG    $IPRL_STR_FRERRH   &FRERRH           ; Reset err ex
tcblock mbipcmd 0x0091 0x0D27   0x0140 0x067B 0x0D43 
#    SETREG    $IPRL_STR_FRMERR   0                 ; Reset bad fr
tcblock mbipcmd 0x0091 0x0D2A   0x0140 0x067A 0x0000 
#    SETREG    R0115              R3895
tcblock mbipcmd 0x0091 0x0D2D   0x0140 0x0073 0x0F37 
#;
#CHKFRMERR:
#    BRANCHNE  $IPRL_STR_FRMDIF        0  &ERREXIT
tcblock mbipcmd 0x0091 0x0D30   0x01B0 0x0679 0x0000 0x0D35 
#    RTNQUE
tcblock mbipcmd 0x0091 0x0D34   0x01FA 
#;
#;................................................................
#;
#ERREXIT:
#    COPYREG   R3072              R125
tcblock mbipcmd 0x0091 0x0D35   0x0142 0x0C00 0x007D 
#    COPYREG   $IPRL_STR_EXPFRM   R126
tcblock mbipcmd 0x0091 0x0D38   0x0142 0x0678 0x007E 
#    COPYREG   $IPRL_STR_FRMDIF   R127
tcblock mbipcmd 0x0091 0x0D3B   0x0142 0x0679 0x007F 
#    ADDREGD   $IPRL_STR_FRMERR   1                 ; Incr bad fra
tcblock mbipcmd 0x0091 0x0D3E   0x01BC 0x067A 0x0001 
#    GOTOREG   $IPRL_STR_FRERRH                     ; exit based o
tcblock mbipcmd 0x0091 0x0D41   0x0158 0x067B 
#;
#FRERRH:
#    THROW     0xFE00
tcblock mbipcmd 0x0091 0x0D43   0x01EA 0xFE00 
#    END
tcblock mbipcmd 0x0091 0x0D45   0x01FC 
#    THROW     0xFE01
tcblock mbipcmd 0x0091 0x0D46   0x01EA 0xFE01 
#    END
tcblock mbipcmd 0x0091 0x0D48   0x01FC 
#    THROW     0xFE02
tcblock mbipcmd 0x0091 0x0D49   0x01EA 0xFE02 
#    END
tcblock mbipcmd 0x0091 0x0D4B   0x01FC 
#    THROW     0xFE03
tcblock mbipcmd 0x0091 0x0D4C   0x01EA 0xFE03 
#    END
tcblock mbipcmd 0x0091 0x0D4E   0x01FC 
#    THROW     0xFE04
tcblock mbipcmd 0x0091 0x0D4F   0x01EA 0xFE04 
#    END
tcblock mbipcmd 0x0091 0x0D51   0x01FC 
#    THROW     0xFE05
tcblock mbipcmd 0x0091 0x0D52   0x01EA 0xFE05 
#    END
tcblock mbipcmd 0x0091 0x0D54   0x01FC 
#    THROW     0xFE06
tcblock mbipcmd 0x0091 0x0D55   0x01EA 0xFE06 
#    END
tcblock mbipcmd 0x0091 0x0D57   0x01FC 
#    THROW     0xFE07
tcblock mbipcmd 0x0091 0x0D58   0x01EA 0xFE07 
#    END
tcblock mbipcmd 0x0091 0x0D5A   0x01FC 
#    THROW     0xFE08
tcblock mbipcmd 0x0091 0x0D5B   0x01EA 0xFE08 
#    END
tcblock mbipcmd 0x0091 0x0D5D   0x01FC 
#    THROW     0xFE09
tcblock mbipcmd 0x0091 0x0D5E   0x01EA 0xFE09 
#    END
tcblock mbipcmd 0x0091 0x0D60   0x01FC 
#    THROW     0xFE0A
tcblock mbipcmd 0x0091 0x0D61   0x01EA 0xFE0A 
#    END
tcblock mbipcmd 0x0091 0x0D63   0x01FC 
#    THROW     0xFE0B
tcblock mbipcmd 0x0091 0x0D64   0x01EA 0xFE0B 
#    END
tcblock mbipcmd 0x0091 0x0D66   0x01FC 
#    THROW     0xFE0C
tcblock mbipcmd 0x0091 0x0D67   0x01EA 0xFE0C 
#    END
tcblock mbipcmd 0x0091 0x0D69   0x01FC 
#    THROW     0xFE0D
tcblock mbipcmd 0x0091 0x0D6A   0x01EA 0xFE0D 
#    END
tcblock mbipcmd 0x0091 0x0D6C   0x01FC 
#    THROW     0xFE0E
tcblock mbipcmd 0x0091 0x0D6D   0x01EA 0xFE0E 
#    END
tcblock mbipcmd 0x0091 0x0D6F   0x01FC 
#    THROW     0xFE0F
tcblock mbipcmd 0x0091 0x0D70   0x01EA 0xFE0F 
#    END
tcblock mbipcmd 0x0091 0x0D72   0x01FC 
#    THROW     0xFE10
tcblock mbipcmd 0x0091 0x0D73   0x01EA 0xFE10 
#    END
tcblock mbipcmd 0x0091 0x0D75   0x01FC 
#    THROW     0xFE11
tcblock mbipcmd 0x0091 0x0D76   0x01EA 0xFE11 
#    END
tcblock mbipcmd 0x0091 0x0D78   0x01FC 
#    THROW     0xFE12
tcblock mbipcmd 0x0091 0x0D79   0x01EA 0xFE12 
#    END
tcblock mbipcmd 0x0091 0x0D7B   0x01FC 
#    THROW     0xFE13
tcblock mbipcmd 0x0091 0x0D7C   0x01EA 0xFE13 
#    END
tcblock mbipcmd 0x0091 0x0D7E   0x01FC 
#    THROW     0xFE14
tcblock mbipcmd 0x0091 0x0D7F   0x01EA 0xFE14 
#    END
tcblock mbipcmd 0x0091 0x0D81   0x01FC 
#;================================================================
#=======================================================
#
# ENBQUE                ; Enable Queue
tcblock mbipldin 0x0136
#
#
return
#
#=======================================================
